1. Technical Field
One or more embodiments of the present invention relate to a switched capacitor circuit with reduced power consumption.
2. Background Art
A switched capacitor circuit is used in many cases as a circuit element of a discrete system, and is applied to a filter, a comparator, an analog-to-digital converter, a digital-to-analog converter, or the like. In addition, the switched capacitor circuit is primarily formed in combination with an operational amplifier.
FIG. 25 is a diagram showing a structure of a positive phase integrating circuit 100 to which a switched capacitor circuit 102 is applied. As shown in FIG. 2, the switched capacitor circuit 102 is operated in a switching manner between a sampling mode in which a clock signal φ1 is set to a high level and a clock signal φ2 is set to a low level such that switches SW1 and SW3 are set to the ON state and switches SW2 and SW4 are set to the OFF state, and charges corresponding to an input voltage VIN are held in a capacitor C1, and an integration mode in which the clock signal φ1 is set to the low level and the clock signal φ2 is set to the high level such that the switches SW1 and SW3 are set to the OFF state and the switches SW2 and SW4 are set to the ON state, and the charges sampled in the capacitor C1 are supplied to a capacitor C2 and integrated.
Here, power consumption of the operational amplifier in the system to which the switched capacitor circuit is applied accounts for a large portion of the power consumption of the overall system such as the analog-to-digital converter and the digital-to-analog converter. Because of this, reduction of the power consumption of the operational amplifier is very effective in reducing the power consumption of the overall system.
However, the reduction in the power consumption and the performance of the circuit are in a tradeoff relationship, and a simple reduction of the current flowing in the operational amplifier may cause degradation of the performance of the system.